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Each channel consists of an input clamp, Correlated Double Sampler (CDS), offset DAC and Programmable Gain Amplifier (PGA), multiplexed to a high performance 16-bit A/D converter.

The CDS amplifiers may be disabled for use with sensors such as Contact Image Sensors (CIS) and CMOS active pixel sensors, which do not require CDS.

The 16-bit digital output is multiplexed into an 8-bit output word that is accessed using two read cycles. The internal registers are programmed through a 3-wire serial interface, and provide adjustment of the gain, offset, and operating mode.

• Operating voltage: 3.3V (typ.)
• Low Power CMOS: 300 mW (typ.)
• Power-Down Mode: 10mA (max.)
• 16-Bit 30 MSPS A/D converter
• Guaranteed won¢t miss codes
• 1~5.85x programmable gain
• Correlated double sampling
• ±250 mV programmable offset
• Input clamp circuitry
• Internal voltage reference
• Multiplexed byte-wide output (8+8 format)
• Programmable 3-wire serial interface
• 3 .3V digital I/O compatibility
• 3-Channel operation up to 30 MSPS
• 2-Channel (even-odd) operation up to 30 MSPS
• 1-Channel operation up to 20 MSPS
• Package types: 28-pin SSOP (209mil), 32-pin QFN